Name Dr Shufan Yang
Job Title Senior Lecturer
Faculty Faculty of Science and Engineering
School School of Mathematics and Computer Science
Subject(s) Computer Systems Engineering
Tel 01902 518594


I am a Senior lecturer in Computer Science at the School of Mathematics and Computer Science, University of Wolverhampton, UK. I also joined the Statistical Cybermetrics Research Group, University of Wolverhampton, led by Prof Mike Thelwall. From 2010 to 2012, I was a post-doctoral researcher at the Intelligent Systems Research Center, University of Ulster, working for the European FP7 Funded project IM-CLeVeR Project, led by Prof Martin McGinnity . In the University of Manchester, I was one of team memebers for Multi-core SpiNNaker chip design, led by Prof Steve Furber, where I had my PhD degree in 2010.


I undertake research in the general area of embedded system design with particular interests in bio-inspired and neuroengineering and associated algorithm issues:


  • Low-power embedded System Design
  • Computational Vision Cognition
  • Multi-core processors Computing

System-on-Chip, Embedded Systems, Computer Architecture, Digital Signal Processing

High performance computing, Computational neuroscience


Professional Member of BCS,  Member of IEEE, Member of HiPEAC , Fellow of HEA




  1. Shufan Yang, Andrew James, KongFatt  Wong-Lin , Martin McGinnity, A low-power Visual Object Tracking System-on-Chip Model based on Neurobiology of perceptual decision-makingļ¼Œjournal of neural computing and applications, Accepted (In press), 2016
  2. Shufan Yang, Renfa Li, Qiang Wu, Modelling Visual Attention Towards Embodiment Cognition on a Reconfigurable and Programmable System, The 27th IEEE System-on-Chip Design Conference, September 7-10, 2015,  Beijing, China. DOI: 10.1109/SOCC.2015.7406924
  3. Javier  Navaridas, Steve  Furber, Garside Jim, Xin Jin, Mukaram Khan, Lester David, Luján Mikel, Miguel-Alonso José, Painkras Eustace, Patterson Cameron, Plana Luis A., Rast Alexander, Richards Dominic, Shi  Yebin, Temple Steve, Wu Jian and Shufan Yang. SpiNNaker: Fault Tolerance in a Power- and Area- Constrained Large-Scale Neuromimetic Architecture. Parallel Computing. 2013; In(Press): eScholarID:207676 | DOI:10.1016/j.parco.2013.09.001
  4. Shufan Yang, Renfa Li, Hillenbrand Dominc, Modelling Nanoplasmonic Device Based on an Off-shelfHybrid Desktop Supercomputing Platform, The 13th IEEE International Conference on Nanotechnology (IEEE-NANO 2013), August 5-8, 2013, Shangri-La Hotel, Beijing, China. DOI:0.1109/NANO.2013.6720891
  1. Shufan Yang,  Martin McGinnity and Wong-Lin KongFatt, Adaptive Inhibitory Control for Embedded Real-time Application, Front. Neuroeng, 2012, 5(10). DOI: 10.3389/fneng.2012.00010, 2012
  1. Shufan Yang and. Martin McGinnity T, A Biologically Plausible Real-time Spiking Neuron Simulation Environment Based on a Multiple-FPGA Platform, ACM SIGARTH Computer Architecture News, 2011, 39(4). DOI:10.1145/2082156.2082176
  2. Shufan Yang, Wu Qiang, Xiao Xiongren, Hillenbrand Dominic, Li Renfa, Fair Access to External Memory for Chip-multiprocessors, 19th Reconfigurable Architectures Workshop, Shanghai, China, May 21-22, 2012. DOI:10.1109/IPDPSW.2012.36
  3. Dominic Hillenbran, Christian Brugger, Tao Jie, Shufan Yang, Balzer Matthias, RIVER: Reconfigurable Pre-Synthesized-Streaming Architecture for Signal Processing on FPGA, 19th Reconfigurable Architectures Workshop, China, May 21-22, 2012. DOI: 10.1109/IPDPSW.2012.49
  1. Hillenbrand Dominic, Brugger Christian, Tao Jie, Shufan Yang, Balzer Matthias,  RIVER Architecture:Reconfigurable Flow and Fabric for Parallel Stream Processing on FPGAs, 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, York, UK, 9-11,July, 2012.
  1. Shufan  Yang, Qiang Wu and Renfa Li, A Case for Spiking Neural Network Simulation Based on Configurable Multiple-FPGA Systems, Neuron Dynamic, 2011, 14(1): 301-309, DOI: 10.1007/s11571-011-9170-0
  1. Shufan Yang, Steve Furber, Yebin Shi and Plana Luis A. A Token-Managed Admission Control System for QoS Provision on a Best-Effort GALS Interconnect. Fundamenta Informaticae. 2009; 95(1): 53-72.DOI:10.3233/FI-2009-139.
  2. Shufan Yang, Steve Furber and Luis Plana, Adaptive admission control on the SpiNNaker MPSoC, Proceedings of the 2009 IEEE International SOC Conference. IEEE Computer Society: 2009:243-246.DOI:10.1109/SOCCON.2009.5398050
  1. Rast Alexander D., Shufan  Yang, Kham Mukaram, Furber Steve, Virtual synaptic Interconnect using an Asynchronous Network-on-Chip, JICN’08, Hongkong, China, June, 2008.
  1. Shufan  Yang, Furber Steve, Shi Yebin and Plana Luis, An Admission Control System for QoS Provision on a Best-effort GALS Interconnect, Proceedings 8th International Conference on Application of Concurrency to System Design (ACSD'08). IEEE Computer Society: 2008: 200-207. DOI:10.1109/ACSD.2008.4574612